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| NTE1254 Integrated Circuit Phase-Lock Loop (PLL) Frequency Synthesizer for CB Features: D Programmable Divider - Divided by 3 to 255 D 10-Bit Divider D Phase Detector D Reference Oscillation Circuit D On-Chip Filter Amplifier D Code Converter D Only two or three crystals required for CB radio AM frequency selection D Unlocked signals are detected at instant stop "IS" terminal D Two type program mode can be selected to change input mode level M: Low level . Binary code input enables, divided by 3 to 255 M: High level . BCD code enables that the data at P1 to P6 port is offset 90 by code converter D Internal active filter amplifier has a long holding time due to very high input impedance characteristics of the CMOS-this is to obtain very good spurious response. D Output signal of the "I" can be used to stop the spurious radiation when the channel selector makes misprogramming such as rotary switch's lose contact. D High speed and low power consumption due to CMOS D Single power supply and fully TTL compatible: VDD = 5 0.5 Volts D Operating Temperature: TA = -30 to 65C D Pull down resistors installed in program and mode switch inputs Absolute Maximum Ratings: Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0V Operating Temperature Range, Topr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -35 to +75C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to +125C Electrical Characteristics: (TA = - 35 to +75C unless otherwise specified) Parameter Power Supply Total Current High Level Input Voltage Low Level Input Voltage High Level Output Voltage Symbol VDD IDD VIH VIL VOH f=0 All Inputs All Inputs All Outputs Except D2, IO = -0.3mA, VDD = 4.5V IO = -0.15mA, VDD = 4.5V Low Level Output Voltage Leakage Current Input Capacitance Maximum Frequency Response VOL IL Ci fdmax fpmax All Inputs, IO = 0.5mA, VDD = 4.5V EO (Floating), Al TA = +25C PI, FD, FP, X1, Vi = 0 X1 - X2, Divider Programmable Divider Pin Connection Diagram Program Input P1 Program Input P2 Program Input P3 Program Input P4 Program Input P5 Program Input P6 Program Input P7 Program Input P8 1/2 Output Reference 1 2 3 4 5 6 7 8 9 24 Inhibit Output 23 VSS 22 Instant Stop 21 Phase Error Output 20 Filter Amp Input 19 Filter Amp Output 18 Detector Input 17 Divider Output 16 Detector Input 15 Divider Output 14 Input Mode Switch 13 Divider Input Test Conditions Min 4.5 - 0.8VDD -0.3 0.85VDD 0.85VDD -0.3 - - 11 - Typ 5.0 - - - - - - 1.0 - - 2 Max 5.5 10 VDD 0.2VDD VDD VDD 0.15VDD - 10 - - Unit V mA V V V V V nA pF MHz MHz X'tal Input 10 X'tal Input 11 VDD 12 24 13 1 12 1.300 (33.02) Max .225 (5.73) Max .520 (13.2) .100 (2.54) 1.100 (27.94) .126 (3.22) Min .600 (15.24) |
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